Introduction This lab is an introduction to logic design using Verilog-HDL with the Xilinx ISE 9.2 tools. No new logic design concepts are presented in this lab. The goals of this lab are for you to become familiar with the tools you will be using for the rest of the semester: • Xilinx’s ISE Project Navigator tool for Verilog-HDL. • Xilinx’s Spartan-3 Starter Kit. • Model Technology’s Modelsim simulator for Verilog-HDL. Learning Outcomes to be assessed LO1. Understand the concepts, principles and theories of microelectronic/IC circuit and system design appropriate to the postgraduate level. LO2. Develop and strengthen the skills related to VLSI design. LO3. Has knowledge and understanding of appropriate hardware and software used in the field of Microelectronic/IC System Design. LO4. Develop advanced skills in microelectronic/IC system design, at the gate and register levels. LO5. Underpin their education in Microelectronic/IC System Design, to enable appreciation of its scientific and engineering context, and to support their understanding of historical, current, and future developments and technologies.